A semiconductor package is a structure incorporated with a chip that is made of a semiconductor material such as silicon and encapsulated or packaged with an insulating resin material such as epoxy resin, to allow delicate circuits and electronic elements formed on the chip to be protected by the resin material from external moisture and contaminant. During operation of the chip, heat is produced by consumption or conversion of electric power. However, the chip-encapsulating resin material is relatively poor in thermal conductivity, making heat produced from the chip hard to be dissipated through the resin material to the outside, and heat accumulated in the chip would undesirably damage performances of the chip due to over heat; this overheat problem is more seriously incurred in a highly integrated chip which generates more heat in operation.
Accordingly, U.S. Pat. No. 5,339,216 discloses a semiconductor package with a thermally conductive member, whose structure is illustrated in FIG. 5 in which a chip 22 is mounted on a die pad 21 of a lead frame 20 and electrically connected to leads 24 of the lead frame 20 by a plurality of bonding wires 23. A thermally conductive member 25 is attached to the chip 22 and has a coefficient of thermal expansion (CTE) same as that of the chip 22, so as to allow heat produced from the chip 22 during operation to be dissipated via the thermally conductive member 25 and reduce thermal stress exerted on the chip 22 in subsequent thermal cycling processes. Further, the thermally conductive member 25 provides a support force for the chip 22 and cooperates with the die pad 21 where the chip 22 is mounted and a resin material 26 used for encapsulating the chip 22 to enhance mechanical strength of the chip 22 and prevent the chip 22 from being damaged by external impact such as shock or vibration.
The above semiconductor package may improve heat dissipating efficiency and mechanical strength of the chip; however, it fails to provide a shielding effect for the chip, making the chip easily subject to external electric and magnetic interference (EMI) which adversely affects electrical performances of the chip.
U.S. Pat. No. 5,997,626 proposes a semiconductor package using a heat spreader for providing an EMI shielding effect. As shown in FIG. 6, a heat spreader 33 is prepared by a material with low thermal resistance (such as metal, alloy, etc.) and attached to a substrate 30 that is mounted with a chip 31 and bonding wires 32. This heat spreader 33 is composed of a flat portion 330 and a plurality of support portions 331 protruding from the flat portion 330, allowing the support portions 331 to be connected to a ground ring 34 formed on the substrate 30 to elevate the flat portion 330 above the chip 31 without interfering the bonding wires 32. The flat portion 330 of the heat spreader 33 is further formed with a protruding portion 332 on a side thereof, the protruding portion 332 extending toward the chip 31 to abut against the chip 31, and an opposite side of the flat portion 330 is exposed to outside of a resin material 35 used for encapsulating the chip 31, such that heat produced from the chip 31 can be directly dissipated through the protruding portion 332 and the exposed flat portion 330 of the heat spreader 33 to the atmosphere, thereby improving heat dissipating performances of the semiconductor package. Moreover, the ground ring 34 and the heat spreader 33 form an EMI shielding structure to shield the chip 31 against external electric and magnetic interference.
However, in order to allow the heat spreader to be simultaneously in contact with the ground ring on the substrate and the chip and to allow a side of the heat spreader to be exposed outside, a particularly designed and complexly shaped heat spreader needs to be prepared for the above semiconductor package, which not only increases fabrication costs but also makes fabrication processes more complicated to implement. Further, it is not easy to accurately control progress of the processes for making the complexly structured heat spreader, which may thus degrade dimensional preciseness or yield of the fabricated products; for example, if thickness or heights of the protruding portion and support portions of the heat spreader are formed with dimensional errors, the heat spreader can not properly come into contact with the chip and the ground ring of the substrate simultaneously, and thus heat dissipating and EMI shielding performances would be adversely affected for the semiconductor package.
Therefore, the problem to be solved is to provide a semiconductor package which can assure electrical performances of the chip, simplify fabrication processes, and reduce fabrication costs thereof.